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fix: Resolved #993 - Support >32 Qubit simulations on AMD GPUs via 3D grid folding#1016

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sun-9545sunoj wants to merge 7 commits intoquantumlib:mainfrom
sun-9545sunoj:gpu-scaling-fix
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fix: Resolved #993 - Support >32 Qubit simulations on AMD GPUs via 3D grid folding#1016
sun-9545sunoj wants to merge 7 commits intoquantumlib:mainfrom
sun-9545sunoj:gpu-scaling-fix

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This PR provides a comprehensive solution to Issue #993, addressing the hipErrorInvalidConfiguration encountered when dispatching circuits beyond 31 qubits on AMD hardware.
By refactoring the dispatch logic and indexing, qsim can now successfully run simulations of 32+ qubits on high-memory devices like the AMD MI300X.
The Solution
Resolved Dispatch Limits:
Implemented 3D grid folding in CreateGrid to bypass the hardware-specific 1D $x$-dimension limit (65,535 blocks). Large workloads are now distributed across $(x, y, z)$ dimensions, supporting the massive thread counts required for high-qubit states.
64-bit Indexing:
Replaced 32-bit signed integers with uint64_t for state-vector addressing. This prevents index overflow when the state space exceeds $2^{31}$ amplitudes, which occurs at the 32-qubit boundary.
Unlocked >32 Qubit Support:
Full State-Vector: Successfully verified 34 qubits (~128GB VRAM) on a single MI300X.

Hybrid Simulation: Introduced a GPU-accelerated hybrid simulator (qsimh_base_cuda.cu) to enable 32+ runs by partitioning the state space into manageable segments.
Verification & Benchmarks
Environment: AMD MI300X (192GB), ROCm 7.1.0.
Regression: Small-scale circuits (< 30 qubits) run with 100% accuracy.
Stress Test: Verified a 50-qubit hybrid simulation with 100% GPU utilization and sustained 750W power draw.
Correctness: Confirmed that 64-bit block IDs are correctly calculated across multi-dimensional grids.

Modified Files
apps/qsimh_base_cuda.cu (New Hybrid Simulator)

lib/cuda2hip.h (ROCm compatibility)

lib/simulator_cuda.h (3D Dispatch)

lib/simulator_cuda_kernels.h (64-bit Kernels)

lib/statespace_cuda.h (Grid Folding)

lib/statespace_cuda_kernels.h (Block ID Helpers)

lib/vectorspace_cuda.h (Namespace Isolation)

@github-actions github-actions bot added the size: L 250< lines changed <1000 label Feb 6, 2026
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Code Review

This pull request introduces significant changes to support simulations with more than 32 qubits on AMD GPUs by implementing 3D grid folding and 64-bit indexing. The changes are comprehensive and address the core issue. My review focuses on ensuring the correctness and maintainability of these new features. I've found several critical issues in the CUDA kernels where the 3D block ID is not calculated correctly, which could lead to incorrect simulation results. Additionally, there are some correctness issues with command-line argument parsing and opportunities to improve maintainability by reducing code duplication.

@github-actions github-actions bot added size: XL lines changed >1000 and removed size: L 250< lines changed <1000 labels Feb 6, 2026
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I suggest you remove all formatting changes for a different PR. My guess is that you have autoformatting enabled in VSCode (or your IDE), which is causing the file to be formatted completely. There is a configuration option to format only the changes (git diff). This is an option in the configuration menu.

@github-actions github-actions bot added size: L 250< lines changed <1000 and removed size: XL lines changed >1000 labels Feb 13, 2026
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Thanks for taking care of this @sun-9545sunoj.
I added a few comments here and there. I am new to QSim, so take that into consideration as well.

I like the overall strategy. Let's wait for @mhucka to see what he thinks.

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I also wonder if the Hybrid simulator is essential to supporting 34 qubits on AMD. Should this go into a different PR?

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sun-9545sunoj commented Feb 13, 2026 via email

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I’m going to let @mhucka decide on that. Other projects I’ve worked on would prefer that. But I’m not part of this community so I’d defer to them for that.

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